Supply Chain Map 4 min read

The Allocation Wall: Who Gets Chips When TSMC Can't Make Enough

The Allocation Wall: Who Gets Chips When TSMC Can't Make Enough

At TSMC's shareholder meeting today, CEO C.C. Wei said what the supply chain already knew: "Customer demand is so high, and we can only support so much." Demand at leading nodes exceeds capacity by 25–30%. The company is scaling CoWoS packaging from 35,000 wafers per month to 130,000 — nearly 4x — and it is still not enough. The question is no longer whether chips will be short. It's who gets them.

The Chokepoint Isn't the Fab. It's the Package.

Every AI accelerator — every Nvidia GPU, every Google TPU, every custom Amazon or Meta chip — needs CoWoS advanced packaging. TSMC is the only company that does it at scale. This makes CoWoS allocation the single most important variable in the AI supply chain.

Morgan Stanley's latest allocation breakdown tells the story:

Nvidia 850K wafers · 60%
B200 · B300 · Rubin
Broadcom 240K wafers · 17%
Google TPU · Meta
AMD 105K wafers · 11%
MI355 · MI400
Everyone else ~12%
Amazon · Microsoft · ...

Nvidia alone consumes more CoWoS capacity than everyone else combined. This isn't a market share number — it's a physical constraint. If you're Amazon building Trainium or Microsoft building Maia, you're fighting for 12% of a production line that's already sold out through 2027.

The Second Wall: 2nm

While CoWoS gates AI chips, a parallel allocation battle is playing out at TSMC's newest node. N2 — the company's first GAA (gate-all-around) transistor process — entered mass production this year. The initial capacity: ~100,000 wafers per month. The allocation:

Customer N2 Share Products
Apple >50% A20 (iPhone 18), M6 (Mac), Vision Pro R2
AMD Significant EPYC Venice (6th gen server CPUs)
MediaTek Allocated Dimensity flagship (Android phones)
Qualcomm Allocated Snapdragon (Android phones, PCs)
Nvidia Skipping to A16 (1.6nm) Feynman GPUs — 2028

Apple's dominance of N2 is structural, not accidental. Apple has long-term capacity reservation agreements with TSMC worth billions annually. When a new node opens, Apple is first in line by contract. Everyone else competes for the remainder.

Trace It to Products

What does this mean for things people actually buy? Follow the chains:

Protected
iPhone 18

Apple A20 → TSMC 2nm (Apple holds >50%). Apple's reservation contracts mean iPhones ship on time. The most protected product in the semiconductor supply chain.

Protected
Nvidia B200/B300 GPUs

Nvidia → TSMC 3nm + CoWoS (Nvidia holds 60%). Not short on allocation — short on total capacity. Nvidia gets what exists; the question is whether "what exists" is enough.

Exposed
AMD MI355/MI400

AMD → TSMC CoWoS (AMD holds 11%). AMD is building competitive AI accelerators but fighting for one-sixth of Nvidia's packaging capacity. Every GPU AMD can't package is a data center that defaults to Nvidia.

Exposed
Custom Cloud Chips

Amazon Trainium / Microsoft Maia / Meta MTIA → TSMC CoWoS (fighting for ~12% combined). The hyperscalers built custom silicon to escape Nvidia's pricing. But they can't escape Nvidia's packaging monopoly at TSMC.

The Revenue Map

TSMC's projected 2026 revenue share by customer reveals the hierarchy of dependency:

AAPL 24%
AVGO 14%
NVDA 11%
MTEK 10%
QCOM 8%
AMD 7%
INTC 7%
Others 19%

Source: Analyst estimates. TSMC projected 2026 revenue >$130B.

The top three customers — Apple, Broadcom, and Nvidia — account for nearly half of TSMC's revenue. They get priority. The bottom half of the customer list competes for whatever capacity the top three don't consume.

What This Map Tells You

Three things become visible when you trace the chains:

1. AMD's AI ambitions are packaging-constrained, not design-constrained. The MI355 and MI400 are technically competitive. But AMD gets 105,000 CoWoS wafers to Nvidia's 850,000. That's the ballgame. AMD's AI GPU revenue ceiling isn't set by engineering — it's set by a packaging line in Taichung.

2. The hyperscaler escape plan has a TSMC-shaped hole. Amazon, Microsoft, Google, and Meta all invested billions in custom silicon to reduce Nvidia dependency. But every one of those custom chips needs TSMC's CoWoS packaging — where Nvidia already holds 60%. The escape route leads back to the same bottleneck.

3. Apple is structurally insulated. While the AI chip world fights over CoWoS, Apple secured the majority of TSMC's 2nm capacity through long-term reservation contracts. Apple doesn't compete for allocation. Apple is the allocation. This is what $33 billion in annual TSMC revenue buys: certainty that your products ship on schedule regardless of what happens to everyone else.

"We are already working very hard."

— C.C. Wei, TSMC CEO, June 4, 2026 shareholder meeting

When the CEO of the world's most important chipmaker tells shareholders he can't keep up, the supply chain map above is what he's describing. Not a temporary shortage. A structural allocation hierarchy where the biggest buyers lock up capacity years in advance, and everyone else gets the remainder. TSMC is building as fast as it can. It's not fast enough. And the companies with the deepest pockets and the longest contracts will be the last ones to feel it.